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32 ili 64bita?

June 11th, 2009 No comments

Ovo je mini linux howto za proveru da li je procesor i/ili operativni sistem 32bit-a ili 64bit-a (x86 platforma). Realna situacija u kojoj možete da naiđete na potrebu da ovako nešto proveravate je ako dođete na potpuno nepoznat “teren” pa treba da utvrdite šta je od postojeće opreme iskorišćeno i kako. Pa eto malog mini howto-a na ovu temu.

a)    ako uname vrati sledeće:

# uname -m
x86_64

Onda je u pitanju 64bit OS a samim tim i procesor.

b)    Ako vrne recimo:

# uname -m
i686

To može i ne mora da znači da je procesor 32-bitan. Da bi definitivno utvrdili koji operativni sistem je instaliran potrebno je otkucati sledeću komandu:

32 bit-a:

# file /sbin/init
/sbin/init: ELF 32-bit LSB shared object, Intel 80386, version 1 (SYSV),
for GNU/Linux 2.6.8, dynamically linked (uses shared libs), stripped

64 bit-a:

# file /sbin/init
/sbin/init: ELF 64-bit LSB executable, AMD x86-64, version 1 (SYSV),
for GNU/Linux 2.6.4, statically linked, for GNU/Linux 2.6.4, stripped

Time će te videti da li je instalirani operativni sistem instaliran za 32 ili 64bitnu arhitekturu.

c) Komanda: # cat /proc/cpuinfo može vam dati specifikaciju procesora kao i sve njegove
mogućnosti. To se vidi u segmentu Flags i to izgleda otprilike ovako:

processor		: 0
vendor_id		: GenuineIntel
cpu family		: 6
model		: 15
model name	: Intel(R) Xeon(R) CPU 5110  @ 1.60GHz
stepping		: 6
cpu MHz		: 1595.930
cache size		: 4096 KB
physical id	: 3
siblings		: 2
core id		: 0
cpu cores		: 2
fpu		: yes
fpu_exception	: yes
cpuid level	: 10
wp			: yes

flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm syscall nx lm constant_tsc pni
monitor ds_cpl vmx tm2 cx16 xtpr dca lahf_lm

bogomips        	: 3195.07
clflush size    	: 64
cache_alignment	: 64
address sizes   	: 36 bits physical, 48 bits virtual
power management:

jer 64bitni procesor ima flag LM koji je označen crvenom bojom u gornjem tekstu.

Ako vas interesuje šta znači koji flag na procesoru koji je na datom sistemu, ukoliko je sistem
32-bitan opis flagova se nalazi u ovom fajlu: # cat /usr/include/asm/cpufeature.h a ako je sistem 64-bitan onda u: # cat /usr/include/asm-x86_64/cpufeature.h

I to izgleda otprilike ovako (za gore navedeni procesor):

Posle X86_FEATURE_<OVDE JE CPU FLAG> a zatim opis flag-a.

/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */
#define X86_FEATURE_FPU        (0*32+ 0) /* Onboard FPU */
#define X86_FEATURE_VME        (0*32+ 1) /* Virtual Mode Extensions */
#define X86_FEATURE_DE        (0*32+ 2) /* Debugging Extensions */
#define X86_FEATURE_PSE     (0*32+ 3) /* Page Size Extensions */
#define X86_FEATURE_TSC        (0*32+ 4) /* Time Stamp Counter */
#define X86_FEATURE_MSR        (0*32+ 5) /* Model-Specific Registers, RDMSR, WRMSR */
#define X86_FEATURE_PAE        (0*32+ 6) /* Physical Address Extensions */
#define X86_FEATURE_MCE        (0*32+ 7) /* Machine Check Architecture */
#define X86_FEATURE_CX8        (0*32+ 8) /* CMPXCHG8 instruction */
#define X86_FEATURE_APIC    (0*32+ 9) /* Onboard APIC */
#define X86_FEATURE_SEP        (0*32+11) /* SYSENTER/SYSEXIT */
#define X86_FEATURE_MTRR    (0*32+12) /* Memory Type Range Registers */
#define X86_FEATURE_PGE        (0*32+13) /* Page Global Enable */
#define X86_FEATURE_MCA        (0*32+14) /* Machine Check Architecture */
#define X86_FEATURE_CMOV    (0*32+15) /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
#define X86_FEATURE_PAT        (0*32+16) /* Page Attribute Table */
#define X86_FEATURE_PSE36    (0*32+17) /* 36-bit PSEs */
#define X86_FEATURE_PN        (0*32+18) /* Processor serial number */
#define X86_FEATURE_CLFLSH    (0*32+19) /* Supports the CLFLUSH instruction */
#define X86_FEATURE_DTES    (0*32+21) /* Debug Trace Store */
#define X86_FEATURE_ACPI    (0*32+22) /* ACPI via MSR */
#define X86_FEATURE_MMX        (0*32+23) /* Multimedia Extensions */
#define X86_FEATURE_FXSR    (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
                          /* of FPU context), and CR4.OSFXSR available */
#define X86_FEATURE_XMM        (0*32+25) /* Streaming SIMD Extensions */
#define X86_FEATURE_XMM2    (0*32+26) /* Streaming SIMD Extensions-2 */
#define X86_FEATURE_SELFSNOOP    (0*32+27) /* CPU self snoop */
#define X86_FEATURE_HT        (0*32+28) /* Hyper-Threading */
#define X86_FEATURE_ACC        (0*32+29) /* Automatic clock control */
#define X86_FEATURE_IA64    (0*32+30) /* IA-64 processor */
/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
/* Don't duplicate feature flags which are redundant with Intel! */
#define X86_FEATURE_SYSCALL    (1*32+11) /* SYSCALL/SYSRET */
#define X86_FEATURE_MMXEXT    (1*32+22) /* AMD MMX extensions */
#define X86_FEATURE_FXSR_OPT    (1*32+25) /* FXSR optimizations */
#define X86_FEATURE_LM        (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT    (1*32+30) /* AMD 3DNow! extensions */
#define X86_FEATURE_3DNOW    (1*32+31) /* 3DNow! */
/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
#define X86_FEATURE_RECOVERY    (2*32+ 0) /* CPU in recovery mode */
#define X86_FEATURE_LONGRUN    (2*32+ 1) /* Longrun power control */
#define X86_FEATURE_LRTI    (2*32+ 3) /* LongRun table interface */
/* Other features, Linux-defined mapping, word 3 */
/* This range is used for feature bits which conflict or are synthesized */
#define X86_FEATURE_CXMMX    (3*32+ 0) /* Cyrix MMX extensions */
#define X86_FEATURE_K6_MTRR    (3*32+ 1) /* AMD K6 nonstandard MTRRs */
#define X86_FEATURE_CYRIX_ARR    (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
#define X86_FEATURE_CENTAUR_MCR    (3*32+ 3) /* Centaur MCRs (= MTRRs) */
#define X86_FEATURE_REP_GOOD    (3*32+ 4) /* rep microcode works well on this CPU */
#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */
#define X86_FEATURE_SYNC_RDTSC  (3*32+6)  /* RDTSC syncs CPU core */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
#define X86_FEATURE_XMM3    (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT    (4*32+ 3) /* Monitor/Mwait support */
#define X86_FEATURE_DSCPL    (4*32+ 4) /* CPL Qualified Debug Store */
#define X86_FEATURE_EST        (4*32+ 7) /* Enhanced SpeedStep */
#define X86_FEATURE_TM2        (4*32+ 8) /* Thermal Monitor 2 */
#define X86_FEATURE_CID        (4*32+10) /* Context ID */
#define X86_FEATURE_CX16    (4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR    (4*32+14) /* Send Task Priority Messages */
/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
#define X86_FEATURE_XSTORE    (5*32+ 2) /* on-CPU RNG present (xstore insn) */
#define X86_FEATURE_XSTORE_EN    (5*32+ 3) /* on-CPU RNG enabled */
#define X86_FEATURE_XCRYPT    (5*32+ 6) /* on-CPU crypto (xcrypt insn) */
#define X86_FEATURE_XCRYPT_EN    (5*32+ 7) /* on-CPU crypto enabled */
/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
#define X86_FEATURE_LAHF_LM    (6*32+ 0) /* LAHF/SAHF in long mode */
#define X86_FEATURE_CMP_LEGACY    (6*32+ 1) /* If yes HyperThreading not valid */
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